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Technical Employment Consultants
Hardware Design Engineer- ASIC- FPGA developer
Job Location: New Jersey
Salary range
68K to 105K
Experience Requirements:
minimum 8 years of digital ASIC/FPGA/CPLD design experience and board-level integration and test. Experience must include a detailed knowledge of high-speed digital ASIC/FPGA/CPLD design and simulation. A specific working knowledge of VHDL (Visual elite preferred), Synthesis (Synplicity, Synopsys) and design analysis tools (Modelsim) is preferred. Additional experience with ASIC floor planning tools and/or high-speed digital PWA design and board-level circuit design is a plus.
Clearance Requirement:
DOD Secret (or higher) clearance is required.
Duties/Responsibilities:
Position Description: Candidates will be responsible for designing ASICs/FPGAs/CPLDs that contain high-speed digital circuits. Candidates will work with systems engineers to translate system requirements into ASIC/FPGA/CPLD requirements, and functional and performance specifications. The candidate will then perform the design, including interfacing directly with PWA developers. Upon delivery of completed boards, candidates will be responsible for ASIC/FPGA/CPLD board-level integration and test, working in concert with cognizant system and software engineers. Applicant selected will be subject to a security investigation and must meet eligibility requirements for access to classified information.
Carl Richards, President
Technical Employment Consultants
1333 Buck Road, Suite 4
Feasterville, Pa. 19053
Phone: 215-396-1503
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