Job #: 38269
Title: FPGA Design Engineer
Job Location: Santa Clara, California - United States
Salary: $175,000.00 - $210,000.00 - US Dollars - Yearly
Other Compensation: bonus twice yearly, 7.5% 401k match, great benefits
Employer Will Recruit From: Local
Relocation Paid?: NO
WHY IS THIS A GREAT OPPORTUNITY?
growing company, great technology, generous PTO, benefits and 401k JOB DESCRIPTION
We are seeking an FPGA Design Engineer for our clients SOC team in their Santa Clara, CA location. Unique opportunity to join an established international company in their North America expansion. Working from the NA headquarters, you will have the ability to be an impact player working with some other exceptionally talented people. Qualified candidates will have several years of FPGA design, prototyping SOC on FPGA platforms and debugging experience. Local candidates are greatly preferred. Experience in a small environment and/or design services company preferred. International experience a plus.
Rich FPGA design experience is required
Experience prototyping SOCs on FPGA platforms is required
Xilinx is a requirement.
HAPS (High performance ASIC Packaging Systems) /ASIC/SOC experience is highly desired
MIPI, camera or video experience desired
Some leadership experience and customer interface experience is also desired.
Develop FPGA designs and subsystems (involving ASICs), from concept to product including:
- Completing implementation in RTL, RTL/netlist verification and evaluating Xilinx Vivado synthesis and P&R results for performance and cost
- Ensuring robust and complete timing constraints and evaluating STA results.
- Balancing performance, area, power, complexity and timing
- Determining and executing development, integration, bring-up and test plans.
- Working closely with firmware and verification teams during specification, development, Integration and Verification phases and deliver working FPGA platforms
- Interfacing to third-party IP
- Client interface
- BS or MS in Electrical Engineering.
- 5+ years of Rich FPGA design experience.
- 5+ years of RTL Development using Verilog, System Verilog, VHDL
- MIPI, camera or video experience
- HAPS greatly preferred
- client interface experience
- Xilinx experience
- Demonstrated experience working on FPGA Design projects, including work with SOC (ARM/RISC-V CPU based), MIPI, XAUI, USB, Flash, SDIO, PCI-E, and DDR# Interfaces.
- Familiarity with Synopsys (HAPS, Proto-compiler) and Xilinx tools/IPs for FPGA Design and implementation.
- Strong coding, debugging skills on both UVM and FPGA Platforms
- Hands on experience with Debuggers like Lauterbach, J-Link, ARM-DS, Testers & Scope.
- Proven expertise in one or more of the following domains: CoreSight, SoC-400, SoC-600, OCP, AXI, ACE, AHB and APB
- Familiarity with revision control concepts and tools (e.g. Subversion)
- Experience with Perl, Tcl, Python, Unix scripting.
- Teamwork, dedication, strong communications and interpersonal skills
- Excellent written and oral communication skills
- Self starter, driven and motivated to work under strict timelines with a can do attitude
- Experience with MIPI, PCIe, AXI/AHB, UVM, USB 3.1, LPDDR4 Interface is a plus.
- Experience with S2C or HAPS platform is a plus.
- Good knowledge of embedded camera system and CMOS imaging sensor devices.
- Familiarity with MIPI C /D PHY & have Prior experience with Image Sensors & be able to Tune & bring up different Types of Sensors.
University - Bachelor`s Degree/3-4 Year Degree
How to Apply: